Uncle Kamal - Core __exclusive__

| Opcode | Mnemonic | Description | |--------|----------|-------------| | 0b0001xxx | (Tensor MAC) | TMA rd, rs1, rs2, imm – performs rd += rs1 * rs2 on 8‑bit vectors; imm encodes vector length (1‑16). | | 0b0010xxx | TLD (Tensor Load) | TLD rd, [rs1 + imm] – loads a vector from US to accelerator register file. | | 0b0011xxx | TST (Tensor Store) | TST [rs1 + imm], rs2 – stores accelerator result back to US. | | 0b0100xxx | TPR (Tensor Prefetch) | Hints to prefetch weight tiles into the accelerator’s local buffer. |